[Keyboard] Fix matrix issues with Promethium (#13648)
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1 changed files with 154 additions and 153 deletions
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@ -31,12 +31,15 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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/* key matrix size */
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#define MATRIX_COLS 6
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#define MATRIX_ROWS 3
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#define MATRIX_ROWS 9
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/* default pin-out */
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#define MATRIX_COL_PINS { F4, F1, F0, D6, D0, D1 }
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#define MATRIX_ROW_PINS { F5, F6, F7 }
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#define TRACKPOINT_PINS { B7, B6, D7 }
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#define MATRIX_COL_PINS \
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{ F4, F1, F0, D6, D0, D1 }
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#define MATRIX_ROW_PINS \
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{ F5, F6, F7, NO_PIN, NO_PIN, NO_PIN, NO_PIN, NO_PIN, NO_PIN }
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#define TRACKPOINT_PINS \
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{ B7, B6, D7 }
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#define UNUSED_PINS
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/*
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@ -48,7 +51,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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* DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
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* ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
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*
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*/
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*/
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#define DIODE_DIRECTION COL2ROW
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// #define BACKLIGHT_PIN B7
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@ -90,9 +93,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
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//#define FORCE_NKRO
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/* key combination for command */
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#define IS_COMMAND() ( \
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get_mods() == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT) | MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RCTRL)) \
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)
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#define IS_COMMAND() (get_mods() == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT) | MOD_BIT(KC_LCTRL) | MOD_BIT(KC_RCTRL)))
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/* control how magic key switches layers */
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//#define MAGIC_KEY_SWITCH_LAYER_WITH_FKEYS true
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@ -240,8 +241,8 @@ enum led_sequence {
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LED_TOTAL
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};
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#define RGB_DI_PIN B5
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#define RGBSPS_NUM LED_TOTAL
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# define RGB_DI_PIN B5
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# define RGBSPS_NUM LED_TOTAL
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#endif
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/* PS/2 mouse */
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@ -259,68 +260,68 @@ enum led_sequence {
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/* PS/2 mouse interrupt version */
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#ifdef PS2_USE_INT
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/* uses INT1 for clock line(ATMega32U4) */
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#define PS2_CLOCK_PORT PORTD
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#define PS2_CLOCK_PIN PIND
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#define PS2_CLOCK_DDR DDRD
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#define PS2_CLOCK_BIT 3
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#define PS2_DATA_PORT PORTD
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 2
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# define PS2_CLOCK_PORT PORTD
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# define PS2_CLOCK_PIN PIND
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# define PS2_CLOCK_DDR DDRD
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# define PS2_CLOCK_BIT 3
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# define PS2_DATA_PORT PORTD
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# define PS2_DATA_PIN PIND
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# define PS2_DATA_DDR DDRD
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# define PS2_DATA_BIT 2
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#define PS2_INT_INIT() do { \
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EICRA |= ((1<<ISC31) | \
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(0<<ISC30)); \
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} while (0)
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#define PS2_INT_ON() do { \
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EIMSK |= (1<<INT3); \
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} while (0)
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#define PS2_INT_OFF() do { \
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EIMSK &= ~(1<<INT3); \
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} while (0)
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#define PS2_INT_VECT INT3_vect
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# define PS2_INT_INIT() \
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do { \
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EICRA |= ((1 << ISC31) | (0 << ISC30)); \
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} while (0)
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# define PS2_INT_ON() \
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do { \
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EIMSK |= (1 << INT3); \
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} while (0)
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# define PS2_INT_OFF() \
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do { \
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EIMSK &= ~(1 << INT3); \
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} while (0)
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# define PS2_INT_VECT INT3_vect
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#endif
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/* PS/2 mouse USART version */
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#ifdef PS2_USE_USART
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/* XCK for clock line and RXD for data line */
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#define PS2_CLOCK_PORT PORTD
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#define PS2_CLOCK_PIN PIND
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#define PS2_CLOCK_DDR DDRD
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#define PS2_CLOCK_BIT 5
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#define PS2_DATA_PORT PORTD
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#define PS2_DATA_PIN PIND
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#define PS2_DATA_DDR DDRD
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#define PS2_DATA_BIT 2
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# define PS2_CLOCK_PORT PORTD
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# define PS2_CLOCK_PIN PIND
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# define PS2_CLOCK_DDR DDRD
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# define PS2_CLOCK_BIT 5
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# define PS2_DATA_PORT PORTD
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# define PS2_DATA_PIN PIND
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# define PS2_DATA_DDR DDRD
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# define PS2_DATA_BIT 2
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/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
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/* set DDR of CLOCK as input to be slave */
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#define PS2_USART_INIT() do { \
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PS2_CLOCK_DDR &= ~(1<<PS2_CLOCK_BIT); \
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PS2_DATA_DDR &= ~(1<<PS2_DATA_BIT); \
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UCSR1C = ((1 << UMSEL10) | \
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(3 << UPM10) | \
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(0 << USBS1) | \
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(3 << UCSZ10) | \
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(0 << UCPOL1)); \
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# define PS2_USART_INIT() \
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do { \
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PS2_CLOCK_DDR &= ~(1 << PS2_CLOCK_BIT); \
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PS2_DATA_DDR &= ~(1 << PS2_DATA_BIT); \
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UCSR1C = ((1 << UMSEL10) | (3 << UPM10) | (0 << USBS1) | (3 << UCSZ10) | (0 << UCPOL1)); \
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UCSR1A = 0; \
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UBRR1H = 0; \
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UBRR1L = 0; \
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} while (0)
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#define PS2_USART_RX_INT_ON() do { \
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UCSR1B = ((1 << RXCIE1) | \
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(1 << RXEN1)); \
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} while (0)
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#define PS2_USART_RX_POLL_ON() do { \
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} while (0)
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# define PS2_USART_RX_INT_ON() \
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do { \
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UCSR1B = ((1 << RXCIE1) | (1 << RXEN1)); \
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} while (0)
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# define PS2_USART_RX_POLL_ON() \
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do { \
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UCSR1B = (1 << RXEN1); \
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} while (0)
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#define PS2_USART_OFF() do { \
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} while (0)
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# define PS2_USART_OFF() \
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do { \
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UCSR1C = 0; \
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UCSR1B &= ~((1 << RXEN1) | \
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(1 << TXEN1)); \
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} while (0)
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#define PS2_USART_RX_READY (UCSR1A & (1<<RXC1))
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#define PS2_USART_RX_DATA UDR1
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#define PS2_USART_ERROR (UCSR1A & ((1<<FE1) | (1<<DOR1) | (1<<UPE1)))
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#define PS2_USART_RX_VECT USART1_RX_vect
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UCSR1B &= ~((1 << RXEN1) | (1 << TXEN1)); \
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} while (0)
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# define PS2_USART_RX_READY (UCSR1A & (1 << RXC1))
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# define PS2_USART_RX_DATA UDR1
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# define PS2_USART_ERROR (UCSR1A & ((1 << FE1) | (1 << DOR1) | (1 << UPE1)))
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# define PS2_USART_RX_VECT USART1_RX_vect
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#endif
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