Update ws2812_spi.c (#14237)
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1 changed files with 10 additions and 10 deletions
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@ -41,23 +41,23 @@
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// F072 fpclk = 48MHz
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// 48/16 = 3Mhz
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#if WS2812_SPI_DIVISOR == 2
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# define WS2812_SPI_DIVISOR (0)
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# define WS2812_SPI_DIVISOR_CR1_BR_X (0)
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#elif WS2812_SPI_DIVISOR == 4
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# define WS2812_SPI_DIVISOR (SPI_CR1_BR_0)
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# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_0)
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#elif WS2812_SPI_DIVISOR == 8
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# define WS2812_SPI_DIVISOR (SPI_CR1_BR_1)
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# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1)
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#elif WS2812_SPI_DIVISOR == 16 // same as default
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# define WS2812_SPI_DIVISOR (SPI_CR1_BR_1 | SPI_CR1_BR_0)
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# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0)
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#elif WS2812_SPI_DIVISOR == 32
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# define WS2812_SPI_DIVISOR (SPI_CR1_BR_2)
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# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2)
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#elif WS2812_SPI_DIVISOR == 64
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# define WS2812_SPI_DIVISOR (SPI_CR1_BR_2 | SPI_CR1_BR_0)
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# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_0)
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#elif WS2812_SPI_DIVISOR == 128
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# define WS2812_SPI_DIVISOR (SPI_CR1_BR_2 | SPI_CR1_BR_1)
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# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1)
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#elif WS2812_SPI_DIVISOR == 256
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# define WS2812_SPI_DIVISOR (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
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# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
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#else
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# define WS2812_SPI_DIVISOR (SPI_CR1_BR_1 | SPI_CR1_BR_0) // default
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# define WS2812_SPI_DIVISOR_CR1_BR_X (SPI_CR1_BR_1 | SPI_CR1_BR_0) // default
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#endif
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// Use SPI circular buffer
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@ -126,7 +126,7 @@ void ws2812_init(void) {
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#endif // WS2812_SPI_SCK_PIN
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// TODO: more dynamic baudrate
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static const SPIConfig spicfg = {WS2812_SPI_BUFFER_MODE, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), WS2812_SPI_DIVISOR};
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static const SPIConfig spicfg = {WS2812_SPI_BUFFER_MODE, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), WS2812_SPI_DIVISOR_CR1_BR_X};
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spiAcquireBus(&WS2812_SPI); /* Acquire ownership of the bus. */
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spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */
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