Added external spi flash driver. (#15419)
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4 changed files with 547 additions and 0 deletions
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@ -219,6 +219,21 @@ else
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endif
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endif
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VALID_FLASH_DRIVER_TYPES := spi
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FLASH_DRIVER ?= no
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ifneq ($(strip $(FLASH_DRIVER)), no)
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ifeq ($(filter $(FLASH_DRIVER),$(VALID_FLASH_DRIVER_TYPES)),)
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$(error FLASH_DRIVER="$(FLASH_DRIVER)" is not a valid FLASH driver)
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else
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OPT_DEFS += -DFLASH_ENABLE
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ifeq ($(strip $(FLASH_DRIVER)), spi)
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OPT_DEFS += -DFLASH_DRIVER -DFLASH_SPI
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COMMON_VPATH += $(DRIVER_PATH)/flash
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SRC += flash_spi.c
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endif
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endif
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endif
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RGBLIGHT_ENABLE ?= no
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VALID_RGBLIGHT_TYPES := WS2812 APA102 custom
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24
docs/flash_driver.md
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24
docs/flash_driver.md
Normal file
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# FLASH Driver Configuration :id=flash-driver-configuration
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The FLASH driver can be swapped out depending on the needs of the keyboard, or whether extra hardware is present.
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Driver | Description
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-----------------------------------|---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
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`FLASH_DRIVER = spi` | Supports writing to almost all NOR Flash chips. See the driver section below.
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## SPI FLASH Driver Configuration :id=spi-flash-driver-configuration
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Currently QMK supports almost all NOR Flash chips over SPI. As such, requires a working spi_master driver configuration. You can override the driver configuration via your config.h:
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`config.h` override | Description | Default Value
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-----------------------------------------------|--------------------------------------------------------------------------------------|-----------------
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`#define EXTERNAL_FLASH_SPI_SLAVE_SELECT_PIN` | SPI Slave select pin in order to inform that the FLASH is currently being addressed | _none_
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`#define EXTERNAL_FLASH_SPI_CLOCK_DIVISOR` | Clock divisor used to divide the peripheral clock to derive the SPI frequency | `8`
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`#define EXTERNAL_FLASH_PAGE_SIZE` | The Page size of the FLASH in bytes, as specified in the datasheet | `256`
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`#define EXTERNAL_FLASH_SECTOR_SIZE` | The sector size of the FLASH in bytes, as specified in the datasheet | `(4 * 1024)`
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`#define EXTERNAL_FLASH_BLOCK_SIZE` | The block size of the FLASH in bytes, as specified in the datasheet | `(64 * 1024)`
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`#define EXTERNAL_FLASH_SIZE` | The total size of the FLASH in bytes, as specified in the datasheet | `(512 * 1024)`
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`#define EXTERNAL_FLASH_ADDRESS_SIZE` | The Flash address size in bytes, as specified in datasheet | `3`
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!> All the above default configurations are based on MX25L4006E NOR Flash.
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372
drivers/flash/flash_spi.c
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372
drivers/flash/flash_spi.c
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@ -0,0 +1,372 @@
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/*
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Copyright (C) 2021 Westberry Technology (ChangZhou) Corp., Ltd
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include "util.h"
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#include "wait.h"
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#include "debug.h"
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#include "timer.h"
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#include "flash_spi.h"
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#include "spi_master.h"
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/*
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The time-out time of spi flash transmission.
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*/
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#ifndef EXTERNAL_FLASH_SPI_TIMEOUT
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# define EXTERNAL_FLASH_SPI_TIMEOUT 1000
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#endif
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/* ID comands */
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#define FLASH_CMD_RDID 0x9F /* RDID (Read Identification) */
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#define FLASH_CMD_RES 0xAB /* RES (Read Electronic ID) */
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#define FLASH_CMD_REMS 0x90 /* REMS (Read Electronic & Device ID) */
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/* register comands */
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#define FLASH_CMD_WRSR 0x01 /* WRSR (Write Status register) */
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#define FLASH_CMD_RDSR 0x05 /* RDSR (Read Status register) */
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/* READ comands */
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#define FLASH_CMD_READ 0x03 /* READ (1 x I/O) */
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#define FLASH_CMD_FASTREAD 0x0B /* FAST READ (Fast read data) */
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#define FLASH_CMD_DREAD 0x3B /* DREAD (1In/2 Out fast read) */
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/* Program comands */
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#define FLASH_CMD_WREN 0x06 /* WREN (Write Enable) */
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#define FLASH_CMD_WRDI 0x04 /* WRDI (Write Disable) */
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#define FLASH_CMD_PP 0x02 /* PP (page program) */
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/* Erase comands */
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#define FLASH_CMD_SE 0x20 /* SE (Sector Erase) */
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#define FLASH_CMD_BE 0xD8 /* BE (Block Erase) */
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#define FLASH_CMD_CE 0x60 /* CE (Chip Erase) hex code: 60 or C7 */
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/* Mode setting comands */
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#define FLASH_CMD_DP 0xB9 /* DP (Deep Power Down) */
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#define FLASH_CMD_RDP 0xAB /* RDP (Release form Deep Power Down) */
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/* Status register */
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#define FLASH_FLAG_WIP 0x01 /* Write in progress bit */
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#define FLASH_FLAG_WEL 0x02 /* Write enable latch bit */
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// #define DEBUG_FLASH_SPI_OUTPUT
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static bool spi_flash_start(void) { return spi_start(EXTERNAL_FLASH_SPI_SLAVE_SELECT_PIN, EXTERNAL_FLASH_SPI_LSBFIRST, EXTERNAL_FLASH_SPI_MODE, EXTERNAL_FLASH_SPI_CLOCK_DIVISOR); }
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static flash_status_t spi_flash_wait_while_busy(void) {
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uint32_t deadline = timer_read32() + EXTERNAL_FLASH_SPI_TIMEOUT;
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flash_status_t response = FLASH_STATUS_SUCCESS;
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uint8_t retval;
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do {
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bool res = spi_flash_start();
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if (!res) {
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dprint("Failed to start SPI! [spi flash wait while busy]\n");
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return FLASH_STATUS_ERROR;
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}
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spi_write(FLASH_CMD_RDSR);
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retval = (uint8_t)spi_read();
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spi_stop();
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if (timer_read32() >= deadline) {
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response = FLASH_STATUS_TIMEOUT;
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break;
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}
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} while (retval & FLASH_FLAG_WIP);
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return response;
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}
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static flash_status_t spi_flash_write_enable(void) {
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bool res = spi_flash_start();
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if (!res) {
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dprint("Failed to start SPI! [spi flash write enable]\n");
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return FLASH_STATUS_ERROR;
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}
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spi_write(FLASH_CMD_WREN);
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spi_stop();
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return FLASH_STATUS_SUCCESS;
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}
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static flash_status_t spi_flash_write_disable(void) {
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bool res = spi_flash_start();
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if (!res) {
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dprint("Failed to start SPI! [spi flash write disable]\n");
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return FLASH_STATUS_ERROR;
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}
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spi_write(FLASH_CMD_WRDI);
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spi_stop();
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return FLASH_STATUS_SUCCESS;
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}
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/* This function is used for read transfer, write transfer and erase transfer. */
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static flash_status_t spi_flash_transaction(uint8_t cmd, uint32_t addr, uint8_t *data, size_t len) {
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flash_status_t response = FLASH_STATUS_SUCCESS;
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uint8_t buffer[EXTERNAL_FLASH_ADDRESS_SIZE + 1];
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buffer[0] = cmd;
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for (int i = 0; i < EXTERNAL_FLASH_ADDRESS_SIZE; ++i) {
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buffer[EXTERNAL_FLASH_ADDRESS_SIZE - i] = addr & 0xFF;
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addr >>= 8;
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}
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bool res = spi_flash_start();
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if (!res) {
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dprint("Failed to start SPI! [spi flash transmit]\n");
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return FLASH_STATUS_ERROR;
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}
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response = spi_transmit(buffer, sizeof(buffer));
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if ((!response) && (data != NULL)) {
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switch (cmd) {
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case FLASH_CMD_READ:
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response = spi_receive(data, len);
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break;
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case FLASH_CMD_PP:
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response = spi_transmit(data, len);
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break;
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default:
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response = FLASH_STATUS_ERROR;
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break;
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}
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}
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spi_stop();
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return response;
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}
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void flash_init(void) { spi_init(); }
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flash_status_t flash_erase_chip(void) {
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flash_status_t response = FLASH_STATUS_SUCCESS;
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/* Wait for the write-in-progress bit to be cleared. */
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response = spi_flash_wait_while_busy();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to check WIP flag! [spi flash erase chip]\n");
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return response;
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}
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/* Enable writes. */
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response = spi_flash_write_enable();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to write-enable! [spi flash erase chip]\n");
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return response;
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}
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/* Erase Chip. */
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bool res = spi_flash_start();
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if (!res) {
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dprint("Failed to start SPI! [spi flash erase chip]\n");
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return FLASH_STATUS_ERROR;
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}
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spi_write(FLASH_CMD_CE);
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spi_stop();
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/* Wait for the write-in-progress bit to be cleared.*/
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response = spi_flash_wait_while_busy();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to check WIP flag! [spi flash erase chip]\n");
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return response;
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}
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return response;
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}
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flash_status_t flash_erase_sector(uint32_t addr) {
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flash_status_t response = FLASH_STATUS_SUCCESS;
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/* Check that the address exceeds the limit. */
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if ((addr + (EXTERNAL_FLASH_SECTOR_SIZE)) >= (EXTERNAL_FLASH_SIZE) || ((addr % (EXTERNAL_FLASH_SECTOR_SIZE)) != 0)) {
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dprintf("Flash erase sector address over limit! [addr:0x%x]\n", (uint32_t)addr);
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return FLASH_STATUS_ERROR;
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}
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/* Wait for the write-in-progress bit to be cleared. */
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response = spi_flash_wait_while_busy();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to check WIP flag! [spi flash erase sector]\n");
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return response;
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}
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/* Enable writes. */
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response = spi_flash_write_enable();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to write-enable! [spi flash erase sector]\n");
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return response;
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}
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/* Erase Sector. */
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response = spi_flash_transaction(FLASH_CMD_SE, addr, NULL, 0);
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to erase sector! [spi flash erase sector]\n");
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return response;
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}
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/* Wait for the write-in-progress bit to be cleared.*/
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response = spi_flash_wait_while_busy();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to check WIP flag! [spi flash erase sector]\n");
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return response;
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}
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return response;
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}
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flash_status_t flash_erase_block(uint32_t addr) {
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flash_status_t response = FLASH_STATUS_SUCCESS;
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/* Check that the address exceeds the limit. */
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if ((addr + (EXTERNAL_FLASH_BLOCK_SIZE)) >= (EXTERNAL_FLASH_SIZE) || ((addr % (EXTERNAL_FLASH_BLOCK_SIZE)) != 0)) {
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dprintf("Flash erase block address over limit! [addr:0x%x]\n", (uint32_t)addr);
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return FLASH_STATUS_ERROR;
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}
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/* Wait for the write-in-progress bit to be cleared. */
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response = spi_flash_wait_while_busy();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to check WIP flag! [spi flash erase block]\n");
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return response;
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}
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/* Enable writes. */
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response = spi_flash_write_enable();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to write-enable! [spi flash erase block]\n");
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return response;
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}
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/* Erase Block. */
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response = spi_flash_transaction(FLASH_CMD_BE, addr, NULL, 0);
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to erase block! [spi flash erase block]\n");
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return response;
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}
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/* Wait for the write-in-progress bit to be cleared.*/
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response = spi_flash_wait_while_busy();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to check WIP flag! [spi flash erase block]\n");
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return response;
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}
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return response;
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}
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flash_status_t flash_read_block(uint32_t addr, void *buf, size_t len) {
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flash_status_t response = FLASH_STATUS_SUCCESS;
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uint8_t * read_buf = (uint8_t *)buf;
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/* Wait for the write-in-progress bit to be cleared. */
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response = spi_flash_wait_while_busy();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to check WIP flag! [spi flash read block]\n");
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memset(read_buf, 0, len);
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return response;
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}
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/* Perform read. */
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response = spi_flash_transaction(FLASH_CMD_READ, addr, read_buf, len);
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to read block! [spi flash read block]\n");
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memset(read_buf, 0, len);
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return response;
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}
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#if defined(CONSOLE_ENABLE) && defined(DEBUG_FLASH_SPI_OUTPUT)
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dprintf("[SPI FLASH R] 0x%08lX: ", addr);
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for (size_t i = 0; i < len; ++i) {
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dprintf(" %02X", (int)(((uint8_t *)read_buf)[i]));
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}
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dprintf("\n");
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#endif // DEBUG_FLASH_SPI_OUTPUT
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return response;
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}
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flash_status_t flash_write_block(uint32_t addr, const void *buf, size_t len) {
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flash_status_t response = FLASH_STATUS_SUCCESS;
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uint8_t * write_buf = (uint8_t *)buf;
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while (len > 0) {
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uint32_t page_offset = addr % EXTERNAL_FLASH_PAGE_SIZE;
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size_t write_length = EXTERNAL_FLASH_PAGE_SIZE - page_offset;
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if (write_length > len) {
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write_length = len;
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}
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/* Wait for the write-in-progress bit to be cleared. */
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response = spi_flash_wait_while_busy();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to check WIP flag! [spi flash write block]\n");
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return response;
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}
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/* Enable writes. */
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response = spi_flash_write_enable();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to write-enable! [spi flash write block]\n");
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return response;
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}
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#if defined(CONSOLE_ENABLE) && defined(DEBUG_FLASH_SPI_OUTPUT)
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dprintf("[SPI FLASH W] 0x%08lX: ", addr);
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for (size_t i = 0; i < write_length; i++) {
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dprintf(" %02X", (int)(uint8_t)(write_buf[i]));
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}
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dprintf("\n");
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#endif // DEBUG_FLASH_SPI_OUTPUT
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/* Perform the write. */
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response = spi_flash_transaction(FLASH_CMD_PP, addr, write_buf, write_length);
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to write block! [spi flash write block]\n");
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return response;
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}
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write_buf += write_length;
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addr += write_length;
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len -= write_length;
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}
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/* Wait for the write-in-progress bit to be cleared. */
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response = spi_flash_wait_while_busy();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to check WIP flag! [spi flash write block]\n");
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return response;
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}
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/* Disable writes. */
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response = spi_flash_write_disable();
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if (response != FLASH_STATUS_SUCCESS) {
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dprint("Failed to write-disable! [spi flash write block]\n");
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return response;
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}
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return response;
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}
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136
drivers/flash/flash_spi.h
Normal file
136
drivers/flash/flash_spi.h
Normal file
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/*
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Copyright (C) 2021 Westberry Technology (ChangZhou) Corp., Ltd
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This program is free software: you can redistribute it and/or modify
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||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 2 of the License, or
|
||||
(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
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You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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/* All the following default configurations are based on MX25L4006E Nor FLASH. */
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/*
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The slave select pin of the FLASH.
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This needs to be a normal GPIO pin_t value, such as B14.
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*/
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#ifndef EXTERNAL_FLASH_SPI_SLAVE_SELECT_PIN
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# error "No chip select pin defined -- missing EXTERNAL_FLASH_SPI_SLAVE_SELECT_PIN"
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#endif
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/*
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The clock divisor for SPI to ensure that the MCU is within the
|
||||
specifications of the FLASH chip. Generally this will be PCLK divided by
|
||||
the intended divisor -- check your clock settings and the datasheet of
|
||||
your FLASH.
|
||||
*/
|
||||
#ifndef EXTERNAL_FLASH_SPI_CLOCK_DIVISOR
|
||||
# ifdef __AVR__
|
||||
# define EXTERNAL_FLASH_SPI_CLOCK_DIVISOR 4
|
||||
# else
|
||||
# define EXTERNAL_FLASH_SPI_CLOCK_DIVISOR 8
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
The SPI mode to communicate with the FLASH.
|
||||
*/
|
||||
#ifndef EXTERNAL_FLASH_SPI_MODE
|
||||
# define EXTERNAL_FLASH_SPI_MODE 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
Whether or not the SPI communication between the MCU and FLASH should be
|
||||
LSB-first.
|
||||
*/
|
||||
#ifndef EXTERNAL_FLASH_SPI_LSBFIRST
|
||||
# define EXTERNAL_FLASH_SPI_LSBFIRST false
|
||||
#endif
|
||||
|
||||
/*
|
||||
The Flash address size in bytes, as specified in datasheet.
|
||||
*/
|
||||
#ifndef EXTERNAL_FLASH_ADDRESS_SIZE
|
||||
# define EXTERNAL_FLASH_ADDRESS_SIZE 3
|
||||
#endif
|
||||
|
||||
/*
|
||||
The page size of the FLASH in bytes, as specified in the datasheet.
|
||||
*/
|
||||
#ifndef EXTERNAL_FLASH_PAGE_SIZE
|
||||
# define EXTERNAL_FLASH_PAGE_SIZE 256
|
||||
#endif
|
||||
|
||||
/*
|
||||
The sector size of the FLASH in bytes, as specified in the datasheet.
|
||||
*/
|
||||
#ifndef EXTERNAL_FLASH_SECTOR_SIZE
|
||||
# define EXTERNAL_FLASH_SECTOR_SIZE (4 * 1024)
|
||||
#endif
|
||||
|
||||
/*
|
||||
The block size of the FLASH in bytes, as specified in the datasheet.
|
||||
*/
|
||||
#ifndef EXTERNAL_FLASH_BLOCK_SIZE
|
||||
# define EXTERNAL_FLASH_BLOCK_SIZE (64 * 1024)
|
||||
#endif
|
||||
|
||||
/*
|
||||
The total size of the FLASH in bytes, as specified in the datasheet.
|
||||
*/
|
||||
#ifndef EXTERNAL_FLASH_SIZE
|
||||
# define EXTERNAL_FLASH_SIZE (512 * 1024)
|
||||
#endif
|
||||
|
||||
/*
|
||||
The block count of the FLASH, calculated by total FLASH size and block size.
|
||||
*/
|
||||
#define EXTERNAL_FLASH_BLOCK_COUNT ((EXTERNAL_FLASH_SIZE) / (EXTERNAL_FLASH_BLOCK_SIZE))
|
||||
|
||||
/*
|
||||
The sector count of the FLASH, calculated by total FLASH size and sector size.
|
||||
*/
|
||||
#define EXTERNAL_FLASH_SECTOR_COUNT ((EXTERNAL_FLASH_SIZE) / (EXTERNAL_FLASH_SECTOR_SIZE))
|
||||
|
||||
/*
|
||||
The page count of the FLASH, calculated by total FLASH size and page size.
|
||||
*/
|
||||
#define EXTERNAL_FLASH_PAGE_COUNT ((EXTERNAL_FLASH_SIZE) / (EXTERNAL_FLASH_PAGE_SIZE))
|
||||
|
||||
typedef int16_t flash_status_t;
|
||||
|
||||
#define FLASH_STATUS_SUCCESS (0)
|
||||
#define FLASH_STATUS_ERROR (-1)
|
||||
#define FLASH_STATUS_TIMEOUT (-2)
|
||||
#define FLASH_STATUS_BAD_ADDRESS (-3)
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
void flash_init(void);
|
||||
|
||||
flash_status_t flash_erase_chip(void);
|
||||
|
||||
flash_status_t flash_erase_block(uint32_t addr);
|
||||
|
||||
flash_status_t flash_erase_sector(uint32_t addr);
|
||||
|
||||
flash_status_t flash_read_block(uint32_t addr, void *buf, size_t len);
|
||||
|
||||
flash_status_t flash_write_block(uint32_t addr, const void *buf, size_t len);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
Loading…
Reference in a new issue