1
0
Fork 0

Align PS/2 GPIO defines (#14745)

* Align PS/2 GPIO

* Align PS/2 GPIO

* refactor more keyboards

* Remove more defines

* Put back avr/chibios split

* format
This commit is contained in:
Joel Challis 2021-10-20 20:07:40 +01:00 committed by GitHub
parent 1fb2a0c74e
commit 84d5198ef9
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
12 changed files with 94 additions and 192 deletions

View file

@ -39,14 +39,8 @@ In your keyboard config.h:
```c ```c
#ifdef PS2_USE_BUSYWAIT #ifdef PS2_USE_BUSYWAIT
# define PS2_CLOCK_PORT PORTD # define PS2_CLOCK_PIN D1
# define PS2_CLOCK_PIN PIND # define PS2_DATA_PIN D2
# define PS2_CLOCK_DDR DDRD
# define PS2_CLOCK_BIT 1
# define PS2_DATA_PORT PORTD
# define PS2_DATA_PIN PIND
# define PS2_DATA_DDR DDRD
# define PS2_DATA_BIT 2
#endif #endif
``` ```
@ -65,14 +59,8 @@ In your keyboard config.h:
```c ```c
#ifdef PS2_USE_INT #ifdef PS2_USE_INT
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D2
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D5
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 2
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 5
#define PS2_INT_INIT() do { \ #define PS2_INT_INIT() do { \
EICRA |= ((1<<ISC21) | \ EICRA |= ((1<<ISC21) | \
@ -102,8 +90,8 @@ PS2_USE_INT = yes
In your keyboard config.h: In your keyboard config.h:
```c ```c
#define PS2_CLOCK A8 #define PS2_CLOCK_PIN A8
#define PS2_DATA A9 #define PS2_DATA_PIN A9
``` ```
And in the chibios specifig halconf.h: And in the chibios specifig halconf.h:
@ -127,14 +115,8 @@ In your keyboard config.h:
```c ```c
#ifdef PS2_USE_USART #ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D5
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D2
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */ /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */ /* set DDR of CLOCK as input to be slave */

View file

@ -43,14 +43,8 @@ PS2_USE_BUSYWAIT = yes
```c ```c
#ifdef PS2_USE_BUSYWAIT #ifdef PS2_USE_BUSYWAIT
# define PS2_CLOCK_PORT PORTD # define PS2_CLOCK_PIN D1
# define PS2_CLOCK_PIN PIND # define PS2_DATA_PIN D2
# define PS2_CLOCK_DDR DDRD
# define PS2_CLOCK_BIT 1
# define PS2_DATA_PORT PORTD
# define PS2_DATA_PIN PIND
# define PS2_DATA_DDR DDRD
# define PS2_DATA_BIT 2
#endif #endif
``` ```
@ -69,14 +63,8 @@ PS2_USE_INT = yes
```c ```c
#ifdef PS2_USE_INT #ifdef PS2_USE_INT
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D2
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D5
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 2
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 5
#define PS2_INT_INIT() do { \ #define PS2_INT_INIT() do { \
EICRA |= ((1<<ISC21) | \ EICRA |= ((1<<ISC21) | \
@ -107,14 +95,9 @@ PS2_USE_USART = yes
```c ```c
#ifdef PS2_USE_USART #ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD #ifdef PS2_USE_USART
#define PS2_CLOCK_PIN PIND #define PS2_CLOCK_PIN D5
#define PS2_CLOCK_DDR DDRD #define PS2_DATA_PIN D2
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
/* 同期、奇数パリティ、1-bit ストップ、8-bit データ、立ち下がりエッジでサンプル */ /* 同期、奇数パリティ、1-bit ストップ、8-bit データ、立ち下がりエッジでサンプル */
/* CLOCK の DDR を入力としてスレーブに設定 */ /* CLOCK の DDR を入力としてスレーブに設定 */

View file

@ -45,15 +45,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#ifdef PS2_USE_USART #ifdef PS2_USE_USART
/* XCK for clock line */ /* XCK for clock line */
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D5
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D2
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
/* RXD for data line */
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */ /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */ /* set DDR of CLOCK as input to be slave */
@ -93,15 +86,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
#ifdef PS2_USE_INT #ifdef PS2_USE_INT
/* uses INT1 for clock line(ATMega32U4) */ /* uses INT1 for clock line(ATMega32U4) */
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D1
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D0
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 1
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 0
#define PS2_INT_INIT() do { \ #define PS2_INT_INIT() do { \
EICRA |= ((1<<ISC11) | \ EICRA |= ((1<<ISC11) | \
@ -121,13 +107,6 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
* PS/2 Busywait configuration * PS/2 Busywait configuration
*/ */
#ifdef PS2_USE_BUSYWAIT #ifdef PS2_USE_BUSYWAIT
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D1
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D0
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 1
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 0
#endif #endif

View file

@ -17,14 +17,8 @@
#pragma once #pragma once
#ifdef PS2_USE_USART #ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D5
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D2
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */ /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */ /* set DDR of CLOCK as input to be slave */

View file

@ -12,14 +12,8 @@
#define MATRIX_COLS 23 #define MATRIX_COLS 23
#ifdef PS2_USE_USART #ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D5
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D2
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */ /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */ /* set DDR of CLOCK as input to be slave */

View file

@ -224,27 +224,15 @@ enum led_sequence {
/* PS/2 mouse */ /* PS/2 mouse */
#ifdef PS2_USE_BUSYWAIT #ifdef PS2_USE_BUSYWAIT
# define PS2_CLOCK_PORT PORTD # define PS2_CLOCK_PIN D3
# define PS2_CLOCK_PIN PIND # define PS2_DATA_PIN D2
# define PS2_CLOCK_DDR DDRD
# define PS2_CLOCK_BIT 3
# define PS2_DATA_PORT PORTD
# define PS2_DATA_PIN PIND
# define PS2_DATA_DDR DDRD
# define PS2_DATA_BIT 2
#endif #endif
/* PS/2 mouse interrupt version */ /* PS/2 mouse interrupt version */
#ifdef PS2_USE_INT #ifdef PS2_USE_INT
/* uses INT1 for clock line(ATMega32U4) */ /* uses INT1 for clock line(ATMega32U4) */
# define PS2_CLOCK_PORT PORTD # define PS2_CLOCK_PIN D3
# define PS2_CLOCK_PIN PIND # define PS2_DATA_PIN D2
# define PS2_CLOCK_DDR DDRD
# define PS2_CLOCK_BIT 3
# define PS2_DATA_PORT PORTD
# define PS2_DATA_PIN PIND
# define PS2_DATA_DDR DDRD
# define PS2_DATA_BIT 2
# define PS2_INT_INIT() \ # define PS2_INT_INIT() \
do { \ do { \
@ -264,14 +252,8 @@ enum led_sequence {
/* PS/2 mouse USART version */ /* PS/2 mouse USART version */
#ifdef PS2_USE_USART #ifdef PS2_USE_USART
/* XCK for clock line and RXD for data line */ /* XCK for clock line and RXD for data line */
# define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D5
# define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D2
# define PS2_CLOCK_DDR DDRD
# define PS2_CLOCK_BIT 5
# define PS2_DATA_PORT PORTD
# define PS2_DATA_PIN PIND
# define PS2_DATA_DDR DDRD
# define PS2_DATA_BIT 2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */ /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */ /* set DDR of CLOCK as input to be slave */

View file

@ -12,14 +12,8 @@
#define MATRIX_COLS 3 #define MATRIX_COLS 3
#ifdef PS2_USE_USART #ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D5
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D2
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */ /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling edge */
/* set DDR of CLOCK as input to be slave */ /* set DDR of CLOCK as input to be slave */

View file

@ -34,14 +34,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
/* Only required if you add in a trackpoint hardware to the pcb */ /* Only required if you add in a trackpoint hardware to the pcb */
#ifdef PS2_USE_USART #ifdef PS2_USE_USART
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D5
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D2
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 5
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 2
/* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling /* synchronous, odd parity, 1-bit stop, 8-bit data, sample at falling
* edge */ * edge */
@ -77,14 +71,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#endif #endif
#ifdef PS2_USE_INT #ifdef PS2_USE_INT
#define PS2_CLOCK_PORT PORTD #define PS2_CLOCK_PIN D2
#define PS2_CLOCK_PIN PIND #define PS2_DATA_PIN D5
#define PS2_CLOCK_DDR DDRD
#define PS2_CLOCK_BIT 2
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
#define PS2_DATA_BIT 5
#define PS2_INT_INIT() do { \ #define PS2_INT_INIT() do { \
EICRA |= ((1<<ISC21) | \ EICRA |= ((1<<ISC21) | \

View file

@ -74,16 +74,16 @@ void ps2_interrupt_service_routine(void);
void palCallback(void *arg) { ps2_interrupt_service_routine(); } void palCallback(void *arg) { ps2_interrupt_service_routine(); }
# define PS2_INT_INIT() \ # define PS2_INT_INIT() \
{ palSetLineMode(PS2_CLOCK, PAL_MODE_INPUT); } \ { palSetLineMode(PS2_CLOCK_PIN, PAL_MODE_INPUT); } \
while (0) while (0)
# define PS2_INT_ON() \ # define PS2_INT_ON() \
{ \ { \
palEnableLineEvent(PS2_CLOCK, PAL_EVENT_MODE_FALLING_EDGE); \ palEnableLineEvent(PS2_CLOCK_PIN, PAL_EVENT_MODE_FALLING_EDGE); \
palSetLineCallback(PS2_CLOCK, palCallback, NULL); \ palSetLineCallback(PS2_CLOCK_PIN, palCallback, NULL); \
} \ } \
while (0) while (0)
# define PS2_INT_OFF() \ # define PS2_INT_OFF() \
{ palDisableLineEvent(PS2_CLOCK); } \ { palDisableLineEvent(PS2_CLOCK_PIN); } \
while (0) while (0)
#endif // PROTOCOL_CHIBIOS #endif // PROTOCOL_CHIBIOS

View file

@ -1,14 +1,15 @@
#include <stdbool.h> #include <stdbool.h>
#include <avr/io.h> #include "ps2_io.h"
#include <util/delay.h> #include "gpio.h"
#include "wait.h"
/* Check port settings for clock and data line */ /* Check port settings for clock and data line */
#if !(defined(PS2_CLOCK_PORT) && defined(PS2_CLOCK_PIN) && defined(PS2_CLOCK_DDR) && defined(PS2_CLOCK_BIT)) #if !(defined(PS2_CLOCK_PIN))
# error "PS/2 clock port setting is required in config.h" # error "PS/2 clock setting is required in config.h"
#endif #endif
#if !(defined(PS2_DATA_PORT) && defined(PS2_DATA_PIN) && defined(PS2_DATA_DDR) && defined(PS2_DATA_BIT)) #if !(defined(PS2_DATA_PIN))
# error "PS/2 data port setting is required in config.h" # error "PS/2 data setting is required in config.h"
#endif #endif
/* /*
@ -17,21 +18,17 @@
void clock_init(void) {} void clock_init(void) {}
void clock_lo(void) { void clock_lo(void) {
PS2_CLOCK_PORT &= ~(1 << PS2_CLOCK_BIT); // Transition from input with pull-up to output low via Hi-Z instead of output high
PS2_CLOCK_DDR |= (1 << PS2_CLOCK_BIT); writePinLow(PS2_CLOCK_PIN);
setPinOutput(PS2_CLOCK_PIN);
} }
void clock_hi(void) { void clock_hi(void) { setPinInputHigh(PS2_CLOCK_PIN); }
/* input with pull up */
PS2_CLOCK_DDR &= ~(1 << PS2_CLOCK_BIT);
PS2_CLOCK_PORT |= (1 << PS2_CLOCK_BIT);
}
bool clock_in(void) { bool clock_in(void) {
PS2_CLOCK_DDR &= ~(1 << PS2_CLOCK_BIT); setPinInputHigh(PS2_CLOCK_PIN);
PS2_CLOCK_PORT |= (1 << PS2_CLOCK_BIT); wait_us(1);
_delay_us(1); return readPin(PS2_CLOCK_PIN);
return PS2_CLOCK_PIN & (1 << PS2_CLOCK_BIT);
} }
/* /*
@ -40,19 +37,15 @@ bool clock_in(void) {
void data_init(void) {} void data_init(void) {}
void data_lo(void) { void data_lo(void) {
PS2_DATA_PORT &= ~(1 << PS2_DATA_BIT); // Transition from input with pull-up to output low via Hi-Z instead of output high
PS2_DATA_DDR |= (1 << PS2_DATA_BIT); writePinLow(PS2_DATA_PIN);
setPinOutput(PS2_DATA_PIN);
} }
void data_hi(void) { void data_hi(void) { setPinInputHigh(PS2_DATA_PIN); }
/* input with pull up */
PS2_DATA_DDR &= ~(1 << PS2_DATA_BIT);
PS2_DATA_PORT |= (1 << PS2_DATA_BIT);
}
bool data_in(void) { bool data_in(void) {
PS2_DATA_DDR &= ~(1 << PS2_DATA_BIT); setPinInputHigh(PS2_DATA_PIN);
PS2_DATA_PORT |= (1 << PS2_DATA_BIT); wait_us(1);
_delay_us(1); return readPin(PS2_DATA_PIN);
return PS2_DATA_PIN & (1 << PS2_DATA_BIT);
} }

View file

@ -6,11 +6,11 @@
#include "hal.h" #include "hal.h"
/* Check port settings for clock and data line */ /* Check port settings for clock and data line */
#if !(defined(PS2_CLOCK)) #if !(defined(PS2_CLOCK_PIN))
# error "PS/2 clock setting is required in config.h" # error "PS/2 clock setting is required in config.h"
#endif #endif
#if !(defined(PS2_DATA)) #if !(defined(PS2_DATA_PIN))
# error "PS/2 data setting is required in config.h" # error "PS/2 data setting is required in config.h"
#endif #endif
@ -20,18 +20,18 @@
void clock_init(void) {} void clock_init(void) {}
void clock_lo(void) { void clock_lo(void) {
palSetLineMode(PS2_CLOCK, PAL_MODE_OUTPUT_OPENDRAIN); palSetLineMode(PS2_CLOCK_PIN, PAL_MODE_OUTPUT_OPENDRAIN);
palWriteLine(PS2_CLOCK, PAL_LOW); palWriteLine(PS2_CLOCK_PIN, PAL_LOW);
} }
void clock_hi(void) { void clock_hi(void) {
palSetLineMode(PS2_CLOCK, PAL_MODE_OUTPUT_OPENDRAIN); palSetLineMode(PS2_CLOCK_PIN, PAL_MODE_OUTPUT_OPENDRAIN);
palWriteLine(PS2_CLOCK, PAL_HIGH); palWriteLine(PS2_CLOCK_PIN, PAL_HIGH);
} }
bool clock_in(void) { bool clock_in(void) {
palSetLineMode(PS2_CLOCK, PAL_MODE_INPUT); palSetLineMode(PS2_CLOCK_PIN, PAL_MODE_INPUT);
return palReadLine(PS2_CLOCK); return palReadLine(PS2_CLOCK_PIN);
} }
/* /*
@ -40,16 +40,16 @@ bool clock_in(void) {
void data_init(void) {} void data_init(void) {}
void data_lo(void) { void data_lo(void) {
palSetLineMode(PS2_DATA, PAL_MODE_OUTPUT_OPENDRAIN); palSetLineMode(PS2_DATA_PIN, PAL_MODE_OUTPUT_OPENDRAIN);
palWriteLine(PS2_DATA, PAL_LOW); palWriteLine(PS2_DATA_PIN, PAL_LOW);
} }
void data_hi(void) { void data_hi(void) {
palSetLineMode(PS2_DATA, PAL_MODE_OUTPUT_OPENDRAIN); palSetLineMode(PS2_DATA_PIN, PAL_MODE_OUTPUT_OPENDRAIN);
palWriteLine(PS2_DATA, PAL_HIGH); palWriteLine(PS2_DATA_PIN, PAL_HIGH);
} }
bool data_in(void) { bool data_in(void) {
palSetLineMode(PS2_DATA, PAL_MODE_INPUT); palSetLineMode(PS2_DATA_PIN, PAL_MODE_INPUT);
return palReadLine(PS2_DATA); return palReadLine(PS2_DATA_PIN);
} }

View file

@ -46,6 +46,19 @@ POSSIBILITY OF SUCH DAMAGE.
#include "ps2_io.h" #include "ps2_io.h"
#include "print.h" #include "print.h"
#ifndef PS2_CLOCK_DDR
# define PS2_CLOCK_DDR PORTx_ADDRESS(PS2_CLOCK_PIN)
#endif
#ifndef PS2_CLOCK_BIT
# define PS2_CLOCK_BIT (PS2_CLOCK_PIN & 0xF)
#endif
#ifndef PS2_DATA_DDR
# define PS2_DATA_DDR PORTx_ADDRESS(PS2_DATA_PIN)
#endif
#ifndef PS2_DATA_BIT
# define PS2_DATA_BIT (PS2_DATA_PIN & 0xF)
#endif
#define WAIT(stat, us, err) \ #define WAIT(stat, us, err) \
do { \ do { \
if (!wait_##stat(us)) { \ if (!wait_##stat(us)) { \