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DC01 updates and I2C avr speed overwrite (#4088)

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* DC01 updates and I2C avr speed overwrite

- General updating of DC01
- Made F_SCL define in AVR I2C driver overwritable from config.h

* Update drivers/avr/i2c_master.c
This commit is contained in:
yiancar 2018-10-08 23:27:04 +01:00 committed by Jack Humbert
parent 914d42acd0
commit 98a63d8d6e
3 changed files with 17 additions and 28 deletions
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2
drivers/avr/i2c_master.c
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@ -8,7 +8,9 @@
#include "i2c_master.h" #include "i2c_master.h"
#include "timer.h" #include "timer.h"
#ifndef F_SCL
#define F_SCL 400000UL // SCL frequency #define F_SCL 400000UL // SCL frequency
#endif
#define Prescaler 1 #define Prescaler 1
#define TWBR_val ((((F_CPU / F_SCL) / Prescaler) - 16 ) / 2) #define TWBR_val ((((F_CPU / F_SCL) / Prescaler) - 16 ) / 2)

2
keyboards/dc01/left/config.h
View file

@ -46,6 +46,8 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#define MATRIX_COL_PINS { F4, F1, F0, F7, F6, F5 } #define MATRIX_COL_PINS { F4, F1, F0, F7, F6, F5 }
#define UNUSED_PINS #define UNUSED_PINS
#define F_SCL 300000UL
/* COL2ROW, ROW2COL, or CUSTOM_MATRIX */ /* COL2ROW, ROW2COL, or CUSTOM_MATRIX */
#define DIODE_DIRECTION COL2ROW #define DIODE_DIRECTION COL2ROW

21
keyboards/dc01/left/matrix.c
View file

@ -135,10 +135,7 @@ uint8_t matrix_cols(void) {
return MATRIX_COLS; return MATRIX_COLS;
} }
i2c_status_t i2c_transaction(uint8_t address, uint32_t mask, uint8_t col_offset); i2c_status_t i2c_transaction(uint8_t address, uint32_t mask, uint8_t col_offset);
//uint8_t i2c_transaction_numpad(void);
//uint8_t i2c_transaction_arrow(void);
//this replases tmk code //this replases tmk code
void matrix_setup(void){ void matrix_setup(void){
@ -440,12 +437,9 @@ static void unselect_cols(void)
// Complete rows from other modules over i2c // Complete rows from other modules over i2c
i2c_status_t i2c_transaction(uint8_t address, uint32_t mask, uint8_t col_offset) { i2c_status_t i2c_transaction(uint8_t address, uint32_t mask, uint8_t col_offset) {
i2c_status_t err = i2c_start((address << 1) | I2C_WRITE, 10); i2c_status_t err = i2c_start((address << 1) | I2C_WRITE, 10);
if (err) return err; i2c_write(0x01, 10); //request data in address 1
i2c_write(0x01, 10);
if (err) return err;
i2c_start((address << 1) | I2C_READ, 10); i2c_start((address << 1) | I2C_READ, 5);
if (err) return err;
err = i2c_read_ack(10); err = i2c_read_ack(10);
if (err == 0x55) { //synchronization byte if (err == 0x55) { //synchronization byte
@ -453,27 +447,18 @@ i2c_status_t i2c_transaction(uint8_t address, uint32_t mask, uint8_t col_offset)
for (uint8_t i = 0; i < MATRIX_ROWS-1 ; i++) { //assemble slave matrix in main matrix for (uint8_t i = 0; i < MATRIX_ROWS-1 ; i++) { //assemble slave matrix in main matrix
matrix[i] &= mask; //mask bits to keep matrix[i] &= mask; //mask bits to keep
err = i2c_read_ack(10); err = i2c_read_ack(10);
if (err >= 0) {
matrix[i] |= ((uint32_t)err << (MATRIX_COLS_SCANNED + col_offset)); //add new bits at the end matrix[i] |= ((uint32_t)err << (MATRIX_COLS_SCANNED + col_offset)); //add new bits at the end
} else {
return err;
}
} }
//last read request must be followed by a NACK //last read request must be followed by a NACK
matrix[MATRIX_ROWS - 1] &= mask; //mask bits to keep matrix[MATRIX_ROWS - 1] &= mask; //mask bits to keep
err = i2c_read_nack(10); err = i2c_read_nack(10);
if (err >= 0) {
matrix[MATRIX_ROWS - 1] |= ((uint32_t)err << (MATRIX_COLS_SCANNED + col_offset)); //add new bits at the end matrix[MATRIX_ROWS - 1] |= ((uint32_t)err << (MATRIX_COLS_SCANNED + col_offset)); //add new bits at the end
} else {
return err;
}
} else { } else {
i2c_stop(10); i2c_stop(10);
return 1; return 1;
} }
i2c_stop(10); i2c_stop(10);
if (err) return err;
return 0; return 0;
} }