Add SPI master for ChibiOS/ARM. (#8779)
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Nick Brassel
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5 changed files with 235 additions and 3 deletions
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@ -18,7 +18,24 @@ You may use more than one slave select pin, not just the `SS` pin. This is usefu
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## ChibiOS/ARM Configuration
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ARM support for this driver is not ready yet. Check back later!
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You'll need to determine which pins can be used for SPI -- as an example, STM32 parts generally have multiple SPI peripherals, labeled SPI1, SPI2, SPI3 etc.
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To enable SPI, modify your board's `halconf.h` to enable SPI - both `HAL_USE_SPI` and `SPI_USE_WAIT` should be `TRUE`, and `SPI_SELECT_MODE` should be `SPI_SELECT_MODE_PAD`.
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Then, modify your board's `mcuconf.h` to enable the SPI peripheral you've chosen -- in the case of using SPI2, modify `STM32_SPI_USE_SPI2` to be `TRUE`.
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As per the AVR configuration, you may select any other standard GPIO as a slave select pin, and can be supplied to `spi_start()`.
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Configuration-wise, you'll need to set up the peripheral as per your MCU's datasheet -- the defaults match the pins for a Proton-C, i.e. STM32F303.
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`config.h` override | Description | Default Value
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----------------------------|---------------------------------------------------------------|--------------
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`#define SPI_DRIVER` | SPI peripheral to use - SPI1 => `SPID1`, SPI2 => `SPID2` etc. | `SPID2`
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`#define SPI_SCK_PIN` | The pin to use for the SCK | `B13`
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`#define SPI_SCK_PAL_MODE` | The alternate function mode for the SCK pin | `5`
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`#define SPI_MOSI_PIN` | The pin to use for the MOSI | `B15`
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`#define SPI_MOSI_PAL_MODE` | The alternate function mode for the MOSI pin | `5`
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`#define SPI_MISO_PIN` | The pin to use for the MISO | `B14`
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`#define SPI_MISO_PAL_MODE` | The alternate function mode for the MISO pin | `5`
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## Functions
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137
drivers/chibios/spi_master.c
Normal file
137
drivers/chibios/spi_master.c
Normal file
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@ -0,0 +1,137 @@
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/* Copyright 2020 Nick Brassel (tzarc)
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "spi_master.h"
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#include "quantum.h"
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#include "timer.h"
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static pin_t currentSlavePin = NO_PIN;
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static SPIConfig spiConfig = {false, NULL, 0, 0, 0, 0};
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__attribute__((weak)) void spi_init(void) {
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// Try releasing special pins for a short time
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palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_INPUT);
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palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_INPUT);
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palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_INPUT);
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chThdSleepMilliseconds(10);
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#if defined(USE_GPIOV1)
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palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_STM32_ALTERNATE_PUSHPULL);
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#else
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palSetPadMode(PAL_PORT(SPI_SCK_PIN), PAL_PAD(SPI_SCK_PIN), PAL_MODE_ALTERNATE(SPI_SCK_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(PAL_PORT(SPI_MOSI_PIN), PAL_PAD(SPI_MOSI_PIN), PAL_MODE_ALTERNATE(SPI_MOSI_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(PAL_PORT(SPI_MISO_PIN), PAL_PAD(SPI_MISO_PIN), PAL_MODE_ALTERNATE(SPI_MISO_PAL_MODE) | PAL_STM32_OTYPE_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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#endif
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}
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bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) {
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if (currentSlavePin != NO_PIN || slavePin == NO_PIN) {
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return false;
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}
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uint16_t roundedDivisor = 2;
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while (roundedDivisor < divisor) {
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roundedDivisor <<= 1;
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}
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if (roundedDivisor < 2 || roundedDivisor > 256) {
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return false;
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}
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spiConfig.cr1 = 0;
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if (lsbFirst) {
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spiConfig.cr1 |= SPI_CR1_LSBFIRST;
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}
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switch (mode) {
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case 0:
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break;
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case 1:
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spiConfig.cr1 |= SPI_CR1_CPHA;
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break;
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case 2:
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spiConfig.cr1 |= SPI_CR1_CPOL;
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break;
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case 3:
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spiConfig.cr1 |= SPI_CR1_CPHA | SPI_CR1_CPOL;
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break;
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}
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switch (roundedDivisor) {
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case 2:
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break;
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case 4:
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spiConfig.cr1 |= SPI_CR1_BR_0;
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break;
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case 8:
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spiConfig.cr1 |= SPI_CR1_BR_1;
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break;
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case 16:
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spiConfig.cr1 |= SPI_CR1_BR_1 | SPI_CR1_BR_0;
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break;
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case 32:
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spiConfig.cr1 |= SPI_CR1_BR_2;
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break;
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case 64:
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spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_0;
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break;
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case 128:
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spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1;
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break;
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case 256:
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spiConfig.cr1 |= SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0;
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break;
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}
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currentSlavePin = slavePin;
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spiConfig.ssport = PAL_PORT(slavePin);
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spiConfig.sspad = PAL_PAD(slavePin);
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setPinOutput(slavePin);
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spiStart(&SPI_DRIVER, &spiConfig);
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spiSelect(&SPI_DRIVER);
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return true;
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}
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spi_status_t spi_write(uint8_t data) { return spi_transmit(&data, 1); }
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spi_status_t spi_read(void) {
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uint8_t data = 0;
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spi_receive(&data, 1);
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return data;
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}
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spi_status_t spi_transmit(const uint8_t *data, uint16_t length) {
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spiSend(&SPI_DRIVER, length, data);
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return SPI_STATUS_SUCCESS;
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}
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spi_status_t spi_receive(uint8_t *data, uint16_t length) {
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spiReceive(&SPI_DRIVER, length, data);
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return SPI_STATUS_SUCCESS;
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}
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void spi_stop(void) {
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if (currentSlavePin != NO_PIN) {
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spiUnselect(&SPI_DRIVER);
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spiStop(&SPI_DRIVER);
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currentSlavePin = NO_PIN;
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}
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}
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78
drivers/chibios/spi_master.h
Normal file
78
drivers/chibios/spi_master.h
Normal file
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@ -0,0 +1,78 @@
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/* Copyright 2020 Nick Brassel (tzarc)
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <https://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <ch.h>
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#include <hal.h>
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#include <quantum.h>
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#ifndef SPI_DRIVER
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# define SPI_DRIVER SPID2
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#endif
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#ifndef SPI_SCK_PIN
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# define SPI_SCK_PIN B13
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#endif
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#ifndef SPI_SCK_PAL_MODE
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# define SPI_SCK_PAL_MODE 5
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#endif
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#ifndef SPI_MOSI_PIN
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# define SPI_MOSI_PIN B15
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#endif
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#ifndef SPI_MOSI_PAL_MODE
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# define SPI_MOSI_PAL_MODE 5
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#endif
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#ifndef SPI_MISO_PIN
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# define SPI_MISO_PIN B14
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#endif
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#ifndef SPI_MISO_PAL_MODE
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# define SPI_MISO_PAL_MODE 5
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#endif
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typedef int16_t spi_status_t;
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#define SPI_STATUS_SUCCESS (0)
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#define SPI_STATUS_ERROR (-1)
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#define SPI_STATUS_TIMEOUT (-2)
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#define SPI_TIMEOUT_IMMEDIATE (0)
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#define SPI_TIMEOUT_INFINITE (0xFFFF)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void spi_init(void);
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bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor);
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spi_status_t spi_write(uint8_t data);
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spi_status_t spi_read(void);
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spi_status_t spi_transmit(const uint8_t *data, uint16_t length);
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spi_status_t spi_receive(uint8_t *data, uint16_t length);
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void spi_stop(void);
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#ifdef __cplusplus
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}
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#endif
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@ -156,7 +156,7 @@
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* @brief Enables the SPI subsystem.
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*/
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# if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
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# define HAL_USE_SPI FALSE
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# define HAL_USE_SPI TRUE
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# endif
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/**
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@ -227,7 +227,7 @@
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* SPI driver system settings.
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*/
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#define STM32_SPI_USE_SPI1 FALSE
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#define STM32_SPI_USE_SPI2 FALSE
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#define STM32_SPI_USE_SPI2 TRUE
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#define STM32_SPI_USE_SPI3 FALSE
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#define STM32_SPI_SPI1_DMA_PRIORITY 1
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#define STM32_SPI_SPI2_DMA_PRIORITY 1
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